RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits are zero-extended when loading values smaller than a register, so set high bits such as [8..] in a Cmov selector or [16..] of self or other in the u16 and i16 CmovEq implementations can cause left.cmovz(&right, condition) to produce incorrect output. This issue is fixed in version 0.5.4.

Attack Vector Local

Attack Complexity Low

Privileges Required Low

Attack Requirements Present

User Interaction None

Vulnerable System Confidentiality Impact None

Vulnerable System Integrity Impact Low

Vulnerable System Availability Impact None

Subsequent System Confidentiality Impact None

Subsequent System Integrity Impact None

Subsequent System Availability Impact None

No CVSS v3.1

No CVSS v3.0

No CVSS v2

This CVE is not in the KEV list.

No EPSS score available.

Key SSVC decision points have not yet been added.

Default status is the baseline for the product, each version can override it (e.g. patched versions marked unaffected).

Vendor Product Default status Versions
RustCrypto utils affected
Version Status Constraints
>= 0.1.1, < 0.5.4 affected —

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Project Subscriptions

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Advisories
Source ID Title
Github GHSA Github GHSA GHSA-3rjw-m598-pq24 Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set
Fixes

Solution

No solution given by the vendor.

Workaround

No workaround given by the vendor.

References
Link Providers
https://github.com/RustCrypto/utils/commit/dba6c355c9f241e3726d5ec2a68f9f3b519f6063 cve-icon
https://github.com/RustCrypto/utils/releases/tag/cmov-v0.5.4 cve-icon
https://github.com/RustCrypto/utils/security/advisories/GHSA-3rjw-m598-pq24 cve-icon
History

Fri, 17 Jul 2026 19:00:00 +0000

Type Values Removed Values Added
Description RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits are zero-extended when loading values smaller than a register, so set high bits such as [8..] in a Cmov selector or [16..] of self or other in the u16 and i16 CmovEq implementations can cause left.cmovz(&right, condition) to produce incorrect output. This issue is fixed in version 0.5.4.
Title RustCrypto Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set
Weaknesses CWE-758
References
Metrics cvssV4_0

{'score': 2, 'vector': 'CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:N/VI:L/VA:N/SC:N/SI:N/SA:N'}

Projects

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cve-icon MITRE

Status: PUBLISHED

Assigner: GitHub_M

Published:

Updated: 2026-07-17T18:35:02.078Z

Reserved: 2026-06-03T22:05:13.644Z

Link: CVE-2026-50185

cve-icon Vulnrichment

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cve-icon NVD

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cve-icon Redhat

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cve-icon OpenCVE Enrichment

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Weaknesses